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IEEE

Design and Implementation of High-Speed, Low Power Carry Look-Ahead Adder Using Hybrid GDI Logic and Transmission Gates

Abstract: This paper presents a high-speed, low-power 4-bit Carry Look-Ahead Adder using a hybrid approach by integrating Gate Diffusion Input (GDI) logic and Transmission Gates (TG). The proposed ...
IEEE

Design and Implementation of Carry Look-Ahead Adder Using PTL with Comparative Analysis Against Transmission Gate Logic

Abstract: In modern VLSI design, speed, power consumption, and area are key constraints of modern-day VLSI design. There exist several styles of logic that address these design constraints, including ...